Job DescriptionDevelop and execute verification plans for Pre-Silicon IP/ASIC/SoC designs based on design specifications.Build and...
On site
Full Time
10000
Job DescriptionPerform RTL-to-GDS physical implementation for ASIC IP/subsystem/SoCdesigns using industry-leading EDA tools and AI-assisted methodologies,Develop...
On site
Full Time
10000
KEY RESPONSIBILITIESOwn or lead System Level Test (SLT) debug for customer-return, qualification and factory-reported failures.Analyze...
On site
Full Time
9500